Difference between revisions of "OpenMP in Small Bites/False Sharing"
OpenMP in Small Bites/False Sharing
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== Quiz == | == Quiz == | ||
| + | {{hidden begin | ||
| + | |title = 1. What causes the introduction of caches in parallel architectures? | ||
| + | }} | ||
| + | <quiz display=simple> | ||
| + | { | ||
| + | |type="()"} | ||
| + | + Caches can decrease the performance gap between the cors and the memory. | ||
| + | || Correct | ||
| + | - Caches can be used to accelerate the computation in the cores for parallel programs | ||
| + | || Wrong | ||
| + | - Since higher clock frequencies would cause to much heat on the chip, caches are the only way to accelerate the core. | ||
| + | || Wrong | ||
| + | </quiz> | ||
| + | {{hidden end}} | ||
Revision as of 16:09, 30 November 2020
| Tutorial | |
|---|---|
| Title: | OpenMP in Small Bites |
| Provider: | HPC.NRW
|
| Contact: | tutorials@hpc.nrw |
| Type: | Multi-part video |
| Topic Area: | Programming Paradigms |
| License: | CC-BY-SA |
| Syllabus
| |
| 1. Overview | |
| 2. Worksharing | |
| 3. Data Scoping | |
| 4. False Sharing | |
| 5. Tasking | |
| 6. Tasking and Data Scoping | |
| 7. Tasking and Synchronization | |
| 8. Loops and Tasks | |
| 9. Tasking Example: Sudoku Solver | |
| 10. Task Scheduling | |
| 11. Non-Uniform Memory Access | |
Video
Quiz
1. What causes the introduction of caches in parallel architectures?