Difference between revisions of "OpenMP in Small Bites/False Sharing"
OpenMP in Small Bites/False Sharing
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| Line 15: | Line 15: | ||
{ | { | ||
|type="()"} | |type="()"} | ||
| − | + Caches can decrease the performance gap between the | + | + Caches can decrease the performance gap between the cores and the memory. |
|| Correct | || Correct | ||
- Caches can be used to accelerate the computation in the cores for parallel programs | - Caches can be used to accelerate the computation in the cores for parallel programs | ||
| Line 21: | Line 21: | ||
- Since higher clock frequencies would cause to much heat on the chip, caches are the only way to accelerate the core. | - Since higher clock frequencies would cause to much heat on the chip, caches are the only way to accelerate the core. | ||
|| Wrong | || Wrong | ||
| + | </quiz> | ||
| + | {{hidden end}} | ||
| + | |||
| + | {{hidden begin | ||
| + | |title = 2. Why is false sharing a problem in OpenMP programs? | ||
| + | }} | ||
| + | <quiz display=simple> | ||
| + | { | ||
| + | |type="()"} | ||
| + | - Correctness: The parallel program will deliver non-deterministic results. | ||
| + | || Wrong. False sharing is pure performance problem. Even with false-sharing the results will be determinstic in cache coherent systems. | ||
| + | + Performance: The scalabilty of a parallel program might suffer significantly. | ||
| + | || Correct. | ||
| + | - Compiler: The compiler cannot generate optimal code. | ||
| + | || Wrong. False sharing is caused by the used hardware, not the compiler. | ||
| + | </quiz> | ||
| + | {{hidden end}} | ||
| + | |||
| + | |||
| + | {{hidden begin | ||
| + | |title = 3. What might cause a false sharing effect? | ||
| + | }} | ||
| + | <quiz display=simple> | ||
| + | { | ||
| + | |type="()"} | ||
| + | + Two different memory adresses on the some cache line are accessed by different threads. | ||
| + | || Correct. | ||
| + | - Two different memory adresses on different cache lines are accessed by the same thread. | ||
| + | || Wrong. | ||
| + | - One memory address is accessed by different threads. | ||
| + | || Wrong. | ||
</quiz> | </quiz> | ||
{{hidden end}} | {{hidden end}} | ||
Revision as of 17:14, 30 November 2020
| Tutorial | |
|---|---|
| Title: | OpenMP in Small Bites |
| Provider: | HPC.NRW
|
| Contact: | tutorials@hpc.nrw |
| Type: | Multi-part video |
| Topic Area: | Programming Paradigms |
| License: | CC-BY-SA |
| Syllabus
| |
| 1. Overview | |
| 2. Worksharing | |
| 3. Data Scoping | |
| 4. False Sharing | |
| 5. Tasking | |
| 6. Tasking and Data Scoping | |
| 7. Tasking and Synchronization | |
| 8. Loops and Tasks | |
| 9. Tasking Example: Sudoku Solver | |
| 10. Task Scheduling | |
| 11. Non-Uniform Memory Access | |
Video
Quiz
1. What causes the introduction of caches in parallel architectures?
2. Why is false sharing a problem in OpenMP programs?
3. What might cause a false sharing effect?