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Modern CPU cores use pipelines to overlap different instructions to optimally distribute work over the execution units. The pattern "Pipelining issues" describes a problem in the pipeline which causes the reduction of the overlap and consequently less utilization.


  • In-core throughput far away from design limit
  • performance insensitive to data set size


  • Large integral ratio of cycles to specific instruction count(s)
  • bad (high) CPI

LIKWID performance groups: FLOPS_DP, FLOPS_SP, DATA and CLOCK

Possible optimizations and/or fixes

Applicable applications or algorithms or kernels